From 3406dd64c328bf0f2f1902d42b239f84c136e4f0 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Fri, 4 Aug 2017 15:58:26 -0700 Subject: soc/intel/common/uart: Refactor uart_common_init 1. Create a new function uart_lpss_init which takes the UART LPSS controller out of reset and initializes and enables clock. 2. Instead of passing in m/n clock divider values as parameters to uart_common_init, introduce Kconfig variables so that uart_lpss_init can use the values directly without having to query the SoC. BUG=b:64030366 TEST=Verified that UART still works on APL and KBL boards. Change-Id: I74d01b0037d8c38fe6480c38ff2283d76097282a Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/20884 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/common/block/include/intelblocks/uart.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/common/block/include/intelblocks/uart.h') diff --git a/src/soc/intel/common/block/include/intelblocks/uart.h b/src/soc/intel/common/block/include/intelblocks/uart.h index b46edd76d7..9ec5004e08 100644 --- a/src/soc/intel/common/block/include/intelblocks/uart.h +++ b/src/soc/intel/common/block/include/intelblocks/uart.h @@ -19,8 +19,12 @@ #include #include -void uart_common_init(device_t dev, uintptr_t baseaddr, - uint32_t clk_m_val, uint32_t clk_n_val); +/* + * Common routine to initialize UART controller PCI config space, take it out of + * reset and configure M/N dividers. + */ +void uart_common_init(device_t dev, uintptr_t baseaddr); + void pch_uart_read_resources(struct device *dev); -- cgit v1.2.3