From 8913b783b9d3ffea2eda7cfd1c9e7319ae889246 Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Fri, 11 Dec 2020 22:13:44 +0100 Subject: soc/intel: hook up new gpio device in the soc chips MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This change adds the required gpio operations struct to soc/common gpio code and hooks them up in all socs currently using the gpio block code, except DNV-NS, which is handled in a separate change. Also, add the gpio device to existing chipset devicetrees. Successfully tested on Supermicro X11SSM-F with CB:48097, X11SSH-TF with CB:48711 and OCP DeltaLake with CB:48672. Change-Id: I81dbbf5397b28ffa7537465c53332779245b39f6 Tested-by: Johnny Lin Tested-by: Michael Niewöhner Tested-by: Patrick Rudolph Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/48583 Reviewed-by: Paul Menzel Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/include/intelblocks/gpio.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc/intel/common/block/include/intelblocks/gpio.h') diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h index 173a383f1e..4c29a0c5ba 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio.h @@ -25,6 +25,7 @@ #ifndef __ACPI__ #include +#include /* * GPIO numbers may not be contiguous and instead will have a different @@ -222,5 +223,11 @@ void gpi_clear_int_cfg(void); /* The function performs GPIO Power Management programming. */ void gpio_pm_configure(const uint8_t *misccfg_pm_values, size_t num); +/* + * Set gpio ops of the device to gpio block ops. + * Shall be called by all SoCs that use intelblocks/gpio. + */ +void block_gpio_enable(struct device *dev); + #endif #endif /* _SOC_INTELBLOCKS_GPIO_H_ */ -- cgit v1.2.3