From a67a92e3c081fe09fa75b23e8d2e2460ed5d16ae Mon Sep 17 00:00:00 2001 From: Krishna Prasad Bhat Date: Fri, 25 Feb 2022 10:45:55 +0530 Subject: soc/intel/common: Add Kconfig to enable compression on ME_RW blobs Add SOC_INTEL_CSE_LITE_COMPRESS_ME_RW Kconfig to enable compression on ME_RW blobs. Select the Kconfig to add LZMA compressed ME_RW blobs to ME_RW_A/B regions. On ADL-N, this results in savings of ~665KB in each of ME_RW_A/B regions. FMAP REGION: ME_RW_A Name Offset Type Size Comp me_rw 0x0 raw 1275246 LZMA (1957888 decompressed) (empty) 0x1375c0 null 193056 none FMAP REGION: ME_RW_B Name Offset Type Size Comp me_rw 0x0 raw 1275246 LZMA (1957888 decompressed) (empty) 0x1375c0 null 193056 none Change-Id: I2e31c358b4969b077d65ce6369a877914d573aed Signed-off-by: Krishna Prasad Bhat Reviewed-on: https://review.coreboot.org/c/coreboot/+/62358 Tested-by: build bot (Jenkins) Reviewed-by: Kangheui Won Reviewed-by: EricR Lai Reviewed-by: Reka Norman Reviewed-by: Tim Wawrzynczak --- src/soc/intel/common/block/cse/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc/intel/common/block/cse/Kconfig') diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index 164159c702..fb7548676e 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -150,6 +150,13 @@ config SOC_INTEL_CSE_NPHY_CBFS_FILE help CBFS path and file name for Intel CSE sub-partition NPHY binary +config SOC_INTEL_CSE_LITE_COMPRESS_ME_RW + bool + default n + depends on SOC_INTEL_CSE_LITE_SKU + help + Enable compression on Intel CSE CBFS RW blob + if STITCH_ME_BIN config CSE_COMPONENTS_PATH -- cgit v1.2.3