From 860672e9879e52820d453e3bc41d151116facb1a Mon Sep 17 00:00:00 2001 From: Bora Guvendik Date: Sun, 26 Sep 2021 17:25:48 -0700 Subject: soc/intel/alderlake: Inject CSE TS into CBMEM timestamp table Get boot performance timestamps from CSE and inject them into CBMEM timestamp table after normalizing to the zero-point value. Although consumer CSE sku also supports this feature, it was validated on CSE Lite sku only. BUG=b:182575295 TEST=Able to see TS elapse prior to IA reset on Brya/Redrix 990:CSME ROM started execution 0 944:CSE sent 'Boot Stall Done' to PMC 88,000 945:CSE started to handle ICC configuration 88,000 (0) 946:CSE sent 'Host BIOS Prep Done' to PMC 90,000 (2,000) 947:CSE received 'CPU Reset Done Ack sent' from PMC 282,000 (192,000) 0:1st timestamp 330,857 (48,857) 11:start of bootblock 341,811 (10,953) 12:end of bootblock 349,299 (7,487) Signed-off-by: Bora Guvendik Change-Id: Idcdbb69538ca2977cd97ce1ef9b211ff6510a3f8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59507 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/common/block/cse/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc/intel/common/block/cse/Kconfig') diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index e30244799e..9621e9ad5f 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -166,6 +166,13 @@ config SOC_INTEL_CSE_LITE_COMPRESS_ME_RW help Enable compression on Intel CSE CBFS RW blob +config SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY + def_bool n + depends on SOC_INTEL_CSE_LITE_SKU + help + Mainboard user to select this Kconfig in order to capture pre-cpu + reset boot performance telemetry data. + if STITCH_ME_BIN config CSE_COMPONENTS_PATH -- cgit v1.2.3