From f43adf0b894e916f0403761ecb9147d7061b0619 Mon Sep 17 00:00:00 2001 From: Barnali Sarkar Date: Wed, 27 Dec 2017 13:48:58 +0530 Subject: intel/common/block/cpu: Change post_cpus_init after BS_DEV RESOURCES This patch changes the sequence of post_cpus_init() function of mp_init to very last of the stages, i.e., ON_EXIT of BS_WRITE_TABLES for normal boot path, and to ON_ENTRY of BS_OS_RESUME for S3 Resume path. Also, the fast_spi_cache_bios_region() call inside post_cpus_init() function is left out, since caching the SPI Bios region is not required now at this stage. BUG=none BRANCH=none TEST=Build and boot in Soraka (KBL), executed stability tests on multiple systems. Change-Id: I97c4a4096a3529a21bae6f2cf5aac654523a5b22 Signed-off-by: Barnali Sarkar Reviewed-on: https://review.coreboot.org/23540 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Subrata Banik Reviewed-by: Furquan Shaikh --- src/soc/intel/common/block/cpu/mp_init.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'src/soc/intel/common/block/cpu') diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index ebd55b5188..085a34052e 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -135,14 +135,10 @@ static void post_cpus_init(void *unused) if (mp_run_on_all_cpus(&x86_setup_mtrrs_with_detect, 1000) < 0) printk(BIOS_ERR, "MTRR programming failure\n"); - /* Temporarily cache the memory-mapped boot media. */ - if (IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED) && - IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH)) - fast_spi_cache_bios_region(); - x86_mtrr_check(); } /* Do CPU MP Init before FSP Silicon Init */ BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_ENTRY, init_cpus, NULL); -BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, post_cpus_init, NULL); +BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_EXIT, post_cpus_init, NULL); +BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, post_cpus_init, NULL); -- cgit v1.2.3