From e98722856e37c31152f1561891a1428a7bdbb557 Mon Sep 17 00:00:00 2001 From: Lijian Zhao Date: Sun, 21 Jan 2018 21:05:54 -0800 Subject: soc/intel/cannonlake: Add Cannonlake D0 support in mpinit and report Both early platform information reporting in bootblock and common code CPU driver will add support for cannonlake D0 stepping processor. BUG=None TEST=Boot up system with D0 stepping CPU installed, check serial log that can display as D0 stepping. Change-Id: I76ee974ee027100d7853a110f95b1601987492e4 Signed-off-by: Lijian Zhao Reviewed-on: https://review.coreboot.org/23350 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Pratikkumar V Prajapati Reviewed-by: Aaron Durbin --- src/soc/intel/common/block/cpu/mp_init.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/common/block/cpu') diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index e19127c1b3..ebd55b5188 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -63,6 +63,7 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_CANNONLAKE_A0 }, { X86_VENDOR_INTEL, CPUID_CANNONLAKE_B0 }, { X86_VENDOR_INTEL, CPUID_CANNONLAKE_C0 }, + { X86_VENDOR_INTEL, CPUID_CANNONLAKE_D0 }, { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_A0 }, { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_B0 }, { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 }, -- cgit v1.2.3