From 3f4af0da938e0d9f4d80e77a3d8abd1f6400e57e Mon Sep 17 00:00:00 2001 From: Meera Ravindranath Date: Wed, 12 Feb 2020 16:01:22 +0530 Subject: soc/intel/common: Update Jasper Lake Device IDs Update Jasper Lake CPU, SA and PCH IDs. BUG=b:149185282 BRANCH=None TEST=Compilation for Jasper Lake board is working Change-Id: I2c9ec1eb4236184b981d99250f263172c82f7117 Signed-off-by: Meera Ravindranath Signed-off-by: Varshit Pandya Reviewed-on: https://review.coreboot.org/c/coreboot/+/38849 Tested-by: build bot (Jenkins) Reviewed-by: Aamir Bohra Reviewed-by: Wonkyu Kim --- src/soc/intel/common/block/cpu/mp_init.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/common/block/cpu/mp_init.c') diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 66a358f09a..87cebc0a8f 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -87,6 +87,7 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0_P1 }, { X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 }, { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0 }, + { X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0}, { 0, 0 }, }; -- cgit v1.2.3