From c4772b9fd7fcc29d09d7617dc8cff922118814d7 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 14 Apr 2019 18:38:35 +0200 Subject: cpu/x86: Move checking for MTRR's as a proxy for proper CPU reset MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Checking for empty MTRR_DEF_TYPE_MSR as a proxy for proper CPU reset is common across multiple platforms. Therefore place it in a common location. Change-Id: I81d82fb9fe27cd9de6085251fe1a5685cdd651fc Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/32319 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie Reviewed-by: Kyösti Mälkki Reviewed-by: Furquan Shaikh --- src/soc/intel/common/block/cpu/car/cache_as_ram.S | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) (limited to 'src/soc/intel/common/block/cpu/car') diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S index d3ee671bef..b1648e8eed 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S @@ -28,21 +28,8 @@ bootblock_pre_c_entry: post_code(0x20) - /* - * Use the MTRR default type MSR as a proxy for detecting INIT#. - * Reset the system if any known bits are set in that MSR. That is - * an indication of the CPU not being properly reset. - */ -check_for_clean_reset: - mov $MTRR_DEF_TYPE_MSR, %ecx - rdmsr - and $(MTRR_DEF_TYPE_EN | MTRR_DEF_TYPE_FIX_EN), %eax - cmp $0, %eax - jz no_reset - /* perform warm reset */ - movw $0xcf9, %dx - movb $0x06, %al - outb %al, %dx + movl $no_reset, %esp /* return address */ + jmp check_mtrr /* Check if CPU properly reset */ no_reset: post_code(0x21) -- cgit v1.2.3