From b48caadad54196245f0e7dfcb92caa21e7112307 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Sun, 17 Oct 2021 15:36:45 +0200 Subject: soc/intel: generate SSDT instead of using GNVS for SGX MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GNVS should not be used for values that are static at runtime. Thus, use SSDT for the SGX fields. Change-Id: Icf9f035e0c2b8617eef82fb043293bcb913e3012 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/58394 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/common/block/acpi/acpi.c | 4 ++++ src/soc/intel/common/block/acpi/acpi/globalnvs.asl | 3 --- 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'src/soc/intel/common/block/acpi') diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 16017779d9..b827c58bc1 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -427,4 +428,7 @@ void generate_cpu_entries(const struct device *device) /* Add a method to notify processor nodes */ acpigen_write_processor_cnot(num_virt); + + if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE)) + sgx_fill_ssdt(); } diff --git a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl index 003a5ce3df..ab63a5c407 100644 --- a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl +++ b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl @@ -25,7 +25,4 @@ Field (GNVS, ByteAcc, NoLock, Preserve) A4GB, 64, // 0x30 - 0x37 Base of above 4GB MMIO Resource A4GS, 64, // 0x38 - 0x3f Length of above 4GB MMIO Resource , 64, // 0x40 - 0x47 Hest log buffer (used in SMM, not ASL code) - EPCS, 8, // 0x48 - SGX enabled status - EMNA, 64, // 0x49 - 0x50 EPC base address - ELNG, 64, // 0x51 - 0x58 EPC length } -- cgit v1.2.3