From e5ca71db06a539d30f83d5fdf920e24ef4891df5 Mon Sep 17 00:00:00 2001 From: Sridhar Siricilla Date: Thu, 28 Apr 2022 23:32:01 +0530 Subject: soc/intel/common: Add support to read CPU and PCH Trace Hub modes The patch parses CPU and PCH Trace Hub modes from the debug area in the Descriptor Region. The modes can be updated in the debug area in order to configure the CPU and PCH Trace Hub modes. The debug area's offset starts from the SPI Flash offset:0xf00. For runtime debugging, the OEM Section in the Descriptor Region is being used as debug area. The OEM Section details are documented in the SPI Programmer Guide of CSE Lite kit. TEST=Build code for Gimble Signed-off-by: Sridhar Siricilla Change-Id: I61241c5c1981ddc4b21581bb3ed9f531da5f41b2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64437 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/intel/common/basecode/include/intelbasecode') diff --git a/src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h b/src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h index c8e23822d2..9a01590fcb 100644 --- a/src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h +++ b/src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h @@ -5,6 +5,9 @@ #include +/* Get cpu and pch tracehub modes defined in the OEM Section of descriptor region */ +void debug_get_pch_cpu_tracehub_modes(uint8_t *cpu_tracehub_mode, uint8_t *pch_trachub_mode); + /* Check if CSE firmware update is enabled or not */ bool is_debug_cse_fw_update_disable(void); -- cgit v1.2.3