From 03248033e7be6f81ad5b60ed21a60071aee32c67 Mon Sep 17 00:00:00 2001 From: Alexey Buyanov Date: Mon, 1 Jun 2020 21:41:14 -0700 Subject: soc/intel/common: Introduce ASL2.0 syntax Modify soc/intel/common .asl files to comply with ASL2.0 syntax for better code readability and clarity BUG=none BRANCH=none TEST= Deltan coreboot binary remains the same after the changes are applied Signed-off-by: Alexey Buyanov Change-Id: I8f95cf88f499d9f9bdd8c80c95af52f8fd886cdf Reviewed-on: https://review.coreboot.org/c/coreboot/+/42083 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: V Sowmya Reviewed-by: Angel Pons --- src/soc/intel/common/acpi/dptf/cpu.asl | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'src/soc/intel/common/acpi/dptf/cpu.asl') diff --git a/src/soc/intel/common/acpi/dptf/cpu.asl b/src/soc/intel/common/acpi/dptf/cpu.asl index 7f21006e42..13ad9601d6 100644 --- a/src/soc/intel/common/acpi/dptf/cpu.asl +++ b/src/soc/intel/common/acpi/dptf/cpu.asl @@ -13,7 +13,7 @@ Device (DPTF_CPU_DEVICE) Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) @@ -73,8 +73,8 @@ Device (DPTF_CPU_DEVICE) Method (_TDL) { If (CondRefOf (\_SB.CP00._TSS)) { - Store (SizeOf (\_SB.CP00._TSS), Local0) - Decrement (Local0) + Local0 = SizeOf (\_SB.CP00._TSS) + Local0-- Return (Local0) } Else { Return (0) @@ -92,7 +92,7 @@ Device (DPTF_CPU_DEVICE) Method (SPPC, 1) { - Store (Arg0, \PPCM) + \PPCM = Arg0 /* Notify OS to re-read _PPC limit on each CPU */ \PPCN () @@ -117,8 +117,8 @@ Device (DPTF_CPU_DEVICE) If (CondRefOf (\_SB.MPDL)) { Return (\_SB.MPDL) } ElseIf (CondRefOf (\_SB.CP00._PSS)) { - Store (SizeOf (\_SB.CP00._PSS), Local0) - Decrement (Local0) + Local0 = SizeOf (\_SB.CP00._PSS) + Local0-- Return (Local0) } Else { Return (0) -- cgit v1.2.3