From 03248033e7be6f81ad5b60ed21a60071aee32c67 Mon Sep 17 00:00:00 2001 From: Alexey Buyanov Date: Mon, 1 Jun 2020 21:41:14 -0700 Subject: soc/intel/common: Introduce ASL2.0 syntax Modify soc/intel/common .asl files to comply with ASL2.0 syntax for better code readability and clarity BUG=none BRANCH=none TEST= Deltan coreboot binary remains the same after the changes are applied Signed-off-by: Alexey Buyanov Change-Id: I8f95cf88f499d9f9bdd8c80c95af52f8fd886cdf Reviewed-on: https://review.coreboot.org/c/coreboot/+/42083 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: V Sowmya Reviewed-by: Angel Pons --- src/soc/intel/common/acpi/dptf/charger.asl | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'src/soc/intel/common/acpi/dptf/charger.asl') diff --git a/src/soc/intel/common/acpi/dptf/charger.asl b/src/soc/intel/common/acpi/dptf/charger.asl index fca9590c37..96d314fc40 100644 --- a/src/soc/intel/common/acpi/dptf/charger.asl +++ b/src/soc/intel/common/acpi/dptf/charger.asl @@ -9,7 +9,7 @@ Device (TCHG) Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == One) { Return (0xF) } Else { Return (0x0) @@ -26,11 +26,11 @@ Device (TCHG) Method (PPPC) { /* Convert size of PPSS table to index */ - Store (SizeOf (\_SB.CHPS), Local0) - Decrement (Local0) + Local0 = SizeOf (\_SB.CHPS) + Local0-- /* Check if charging is disabled (AC removed) */ - If (LEqual (\_SB.PCI0.LPCB.EC0.ACEX, Zero)) { + If (\_SB.PCI0.LPCB.EC0.ACEX == 0) { /* Return last power state */ Return (Local0) } Else { @@ -45,8 +45,7 @@ Device (TCHG) Method (SPPC, 1) { /* Retrieve Control (index 4) for specified PPSS level */ - Store (DeRefOf (Index (DeRefOf (Index - (\_SB.CHPS, ToInteger (Arg0))), 4)), Local0) + Local0 = DeRefOf (DeRefOf (\_SB.CHPS[ToInteger (Arg0)])[4]) /* Pass Control value to EC to limit charging */ \_SB.PCI0.LPCB.EC0.CHGS (Local0) -- cgit v1.2.3