From d8c4f2b72462f60ae92a59a976437c2407ec6654 Mon Sep 17 00:00:00 2001
From: Duncan Laurie <dlaurie@chromium.org>
Date: Tue, 22 Apr 2014 10:46:06 -0700
Subject: baytrail: Move MRC cache code to a common directory

This common code can be shared across Intel SOCs.

Change-Id: Id9ec4ccd3fc81cbab19a7d7e13bfa3975d9802d0
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/196263
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit f9919e2551b02056b83918d2e7b515b25541c583)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6967
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
---
 src/soc/intel/common/Kconfig | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 src/soc/intel/common/Kconfig

(limited to 'src/soc/intel/common/Kconfig')

diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
new file mode 100644
index 0000000000..8b02a4a905
--- /dev/null
+++ b/src/soc/intel/common/Kconfig
@@ -0,0 +1,19 @@
+if HAVE_MRC
+
+config CACHE_MRC_SETTINGS
+	bool "Save cached MRC settings"
+	default n
+
+if CACHE_MRC_SETTINGS
+
+config MRC_SETTINGS_CACHE_BASE
+	hex
+	default 0xffb00000
+
+config MRC_SETTINGS_CACHE_SIZE
+	hex
+	default 0x10000
+
+endif # CACHE_MRC_SETTINGS
+
+endif # HAVE_MRC
-- 
cgit v1.2.3