From 7e8998466f6b0cfa410af94da41b18859d6379f2 Mon Sep 17 00:00:00 2001
From: Subrata Banik <subrata.banik@intel.com>
Date: Thu, 17 May 2018 18:28:26 +0530
Subject: soc/intel/common/block: Move cse common functions into block/cse

This patch cleans soc/intel/{cnl, icl, tgl} by moving common
soc code into common/block/cse.

Supported SoC can select existing HECI_DISABLE_USING_SMM option to
select common cse code block to make heci function disable using
sideband interface during SMM mode at preboot envionment.

BUG=b:78109109
TEST=Able to make HECI disable in SMM mode successfully without any hang
or errors in CNL, ICL and TGL platform.

Change-Id: I22a4cc05d3967c7653d2abe2c829b4876516d179
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/26133
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/cannonlake/smihandler.c | 40 +----------------------------------
 1 file changed, 1 insertion(+), 39 deletions(-)

(limited to 'src/soc/intel/cannonlake')

diff --git a/src/soc/intel/cannonlake/smihandler.c b/src/soc/intel/cannonlake/smihandler.c
index 550c92dc6f..4be7897f78 100644
--- a/src/soc/intel/cannonlake/smihandler.c
+++ b/src/soc/intel/cannonlake/smihandler.c
@@ -18,49 +18,11 @@
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <intelblocks/cse.h>
-#include <intelblocks/p2sb.h>
-#include <intelblocks/pcr.h>
 #include <intelblocks/smihandler.h>
 #include <soc/soc_chip.h>
 #include <soc/pci_devs.h>
-#include <soc/pcr_ids.h>
 #include <soc/pm.h>
 
-#define CSME0_FBE	0xf
-#define CSME0_BAR	0x0
-#define CSME0_FID	0xb0
-
-static void pch_disable_heci(void)
-{
-	struct pcr_sbi_msg msg = {
-		.pid = PID_CSME0,
-		.offset = 0,
-		.opcode = PCR_WRITE,
-		.is_posted = false,
-		.fast_byte_enable = CSME0_FBE,
-		.bar = CSME0_BAR,
-		.fid = CSME0_FID
-	};
-	/* Bit 0: Set to make HECI#1 Function disable */
-	uint32_t data32 = 1;
-	uint8_t response;
-	int status;
-
-	/* unhide p2sb device */
-	p2sb_unhide();
-
-	/* Send SBI command to make HECI#1 function disable */
-	status = pcr_execute_sideband_msg(&msg, &data32, &response);
-	if (status && response)
-		printk(BIOS_ERR, "Fail to make CSME function disable\n");
-
-	/* Ensure to Lock SBI interface after this command */
-	p2sb_disable_sideband_access();
-
-	/* hide p2sb device */
-	p2sb_hide();
-}
-
 /*
  * Specific SOC SMI handler during ramstage finalize phase
  *
@@ -75,7 +37,7 @@ void smihandler_soc_at_finalize(void)
 	config = config_of_soc();
 
 	if (!config->HeciEnabled && CONFIG(HECI_DISABLE_USING_SMM))
-		pch_disable_heci();
+		heci_disable();
 }
 
 const smi_handler_t southbridge_smi[SMI_STS_BITS] = {
-- 
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