From 5268b76801280667d8c27619fe2d771569c4e346 Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Mon, 12 Feb 2018 12:24:25 +0100 Subject: src/soc: Fix various typos MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These typos were found through manual review and grep. Change-Id: I6693a9e3b51256b91342881a7116587f68ee96e6 Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/23706 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ronald G. Minnich --- src/soc/intel/cannonlake/include/soc/bootblock.h | 4 ++-- src/soc/intel/cannonlake/include/soc/vr_config.h | 2 +- src/soc/intel/cannonlake/romstage/systemagent.c | 6 +++--- src/soc/intel/cannonlake/systemagent.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) (limited to 'src/soc/intel/cannonlake') diff --git a/src/soc/intel/cannonlake/include/soc/bootblock.h b/src/soc/intel/cannonlake/include/soc/bootblock.h index 2a6ca1fb15..a5c3c323ae 100644 --- a/src/soc/intel/cannonlake/include/soc/bootblock.h +++ b/src/soc/intel/cannonlake/include/soc/bootblock.h @@ -18,11 +18,11 @@ #include -/* Bootblock pre console init programing */ +/* Bootblock pre console init programming */ void bootblock_cpu_init(void); void bootblock_pch_early_init(void); -/* Bootblock post console init programing */ +/* Bootblock post console init programming */ void pch_early_init(void); void pch_early_iorange_init(void); void report_platform_info(void); diff --git a/src/soc/intel/cannonlake/include/soc/vr_config.h b/src/soc/intel/cannonlake/include/soc/vr_config.h index 2cd7dd93c0..385767d957 100644 --- a/src/soc/intel/cannonlake/include/soc/vr_config.h +++ b/src/soc/intel/cannonlake/include/soc/vr_config.h @@ -26,7 +26,7 @@ struct vr_config { * for that domain. */ uint8_t vr_config_enable; - /* Power State X current cuttof in 1/4 Amp increments + /* Power State X current cutoff in 1/4 Amp increments * Range is 0-128A */ uint16_t psi1threshold; uint16_t psi2threshold; diff --git a/src/soc/intel/cannonlake/romstage/systemagent.c b/src/soc/intel/cannonlake/romstage/systemagent.c index f7c7f1a632..61db22e0b8 100644 --- a/src/soc/intel/cannonlake/romstage/systemagent.c +++ b/src/soc/intel/cannonlake/romstage/systemagent.c @@ -34,12 +34,12 @@ void systemagent_early_init(void) { EDRAMBAR, EDRAM_BASE_ADDRESS, EDRAM_BASE_SIZE, "EDRAMBAR" }, }; - /* Set Fixed MMIO addresss into PCI configuration space */ + /* Set Fixed MMIO address into PCI configuration space */ sa_set_pci_bar(soc_fixed_pci_resources, ARRAY_SIZE(soc_fixed_pci_resources)); - /* Set Fixed MMIO addresss into MCH base address */ + /* Set Fixed MMIO address into MCH base address */ sa_set_mch_bar(soc_fixed_mch_resources, ARRAY_SIZE(soc_fixed_mch_resources)); - /* Enable PAM regisers */ + /* Enable PAM registers */ enable_pam_region(); } diff --git a/src/soc/intel/cannonlake/systemagent.c b/src/soc/intel/cannonlake/systemagent.c index 344517d9e8..06b37e0a92 100644 --- a/src/soc/intel/cannonlake/systemagent.c +++ b/src/soc/intel/cannonlake/systemagent.c @@ -25,7 +25,7 @@ /* * SoC implementation * - * Add all known fixed memory ranges for Host Controller/Mmeory + * Add all known fixed memory ranges for Host Controller/Memory * controller. */ void soc_add_fixed_mmio_resources(struct device *dev, int *index) -- cgit v1.2.3