From 2912e8e5dc66708703db79df87e3215408a653ae Mon Sep 17 00:00:00 2001 From: Julien Viard de Galbert Date: Tue, 14 Aug 2018 16:15:26 +0200 Subject: soc/intel/denverton_ns: Enable common block PMC Mainly update headers to build. Added option PMC_GLOBAL_RESET_ENABLE_LOCK to remove function configuring the global reset through PMC base. On denverton the global reset lock is not in PMC base but in the PCI registers so this code cannot be shared. Change-Id: I9ace70862cab63f8355252d034292596c7eab1fd Signed-off-by: Julien Viard de Galbert Reviewed-on: https://review.coreboot.org/25426 Tested-by: build bot (Jenkins) Reviewed-by: Lijian Zhao Reviewed-by: Evandro Luiz Hauenstein Reviewed-by: Philipp Deppenwiese --- src/soc/intel/cannonlake/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/cannonlake') diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 33927286bb..256cf1b6c7 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -53,6 +53,7 @@ config CPU_SPECIFIC_OPTIONS select SMM_TSEG select SMP select SOC_AHCI_PORT_IMPLEMENTED_INVERT + select PMC_GLOBAL_RESET_ENABLE_LOCK select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK -- cgit v1.2.3