From cd4fe0f718cfc49e5d58f1770e23cd065a26241e Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Fri, 29 Mar 2019 17:12:15 +0100 Subject: src: include when appropriate Change-Id: Ib843eb7144b7dc2932931b9e8f3f1d816bcc1e1a Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/26796 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer Reviewed-by: David Guckian --- src/soc/intel/cannonlake/romstage/romstage.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src/soc/intel/cannonlake/romstage') diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 893f37d421..c168da9a38 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include #include #include #include -- cgit v1.2.3