From 7bc4dc5648c6ff37a847e99d7acee11e3e72a79d Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 17 May 2018 18:40:32 +0530 Subject: soc/intel/common/block: Move tco common functions into block/smbus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch cleans soc/intel/{apl/cnl/icl/skl} by moving common soc code into common/block/smbus. BUG=b:78109109 BRANCH=NONE TEST=Build and boot KBL/CNL/APL/ICL platform. Change-Id: I34b33922cafee9f31702587e0f9c03b64f0781b8 Signed-off-by: Subrata Banik Signed-off-by: Maulik V Vaghela Reviewed-on: https://review.coreboot.org/c/26166 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/soc/intel/cannonlake/romstage/power_state.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'src/soc/intel/cannonlake/romstage/power_state.c') diff --git a/src/soc/intel/cannonlake/romstage/power_state.c b/src/soc/intel/cannonlake/romstage/power_state.c index 72361ff83a..99a93accbe 100644 --- a/src/soc/intel/cannonlake/romstage/power_state.c +++ b/src/soc/intel/cannonlake/romstage/power_state.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -66,13 +67,10 @@ int soc_prev_sleep_state(const struct chipset_power_state *ps, void soc_fill_power_state(struct chipset_power_state *ps) { - uint16_t tcobase; uint8_t *pmc; - tcobase = smbus_tco_regs(); - - ps->tco1_sts = inw(tcobase + TCO1_STS); - ps->tco2_sts = inw(tcobase + TCO2_STS); + ps->tco1_sts = tco_read_reg(TCO1_STS); + ps->tco2_sts = tco_read_reg(TCO2_STS); printk(BIOS_DEBUG, "TCO_STS: %04x %04x\n", ps->tco1_sts, ps->tco2_sts); -- cgit v1.2.3