From 0ade3133a0565df7b917a0f82869b10c3d4c57d4 Mon Sep 17 00:00:00 2001 From: Lijian Zhao Date: Fri, 7 Jul 2017 12:25:20 -0700 Subject: soc/intel/cannonlake: Add minimal changes to call FSP Memoryinit The following minimal changes are needed to make system boot until FSP memoryinit got called. 1. Program SA BARs 2. Assume previous power state is S0. Change-Id: Iab96b27d4220acf4089b901bca28018eaba940a1 Signed-off-by: Lijian Zhao Reviewed-on: https://review.coreboot.org/20497 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/cannonlake/romstage/Makefile.inc | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 src/soc/intel/cannonlake/romstage/Makefile.inc (limited to 'src/soc/intel/cannonlake/romstage/Makefile.inc') diff --git a/src/soc/intel/cannonlake/romstage/Makefile.inc b/src/soc/intel/cannonlake/romstage/Makefile.inc new file mode 100644 index 0000000000..99bc25f20e --- /dev/null +++ b/src/soc/intel/cannonlake/romstage/Makefile.inc @@ -0,0 +1,18 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2015-2017 Intel Corporation +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +romstage-y += power_state.c +romstage-y += romstage.c +romstage-y += systemagent.c -- cgit v1.2.3