From fdcc9ab317af2ae9cd69cb2490d3a4444180429a Mon Sep 17 00:00:00 2001 From: Gaggery Tsai Date: Mon, 4 Nov 2019 20:49:10 -0800 Subject: src/soc/intel: Add Cometlake-S and CMP-H skus This patch adds some sku support for CML-S CPU and CMP-H chips. According to doc #605546: CML-S (6+2) G0: A0650h CML-S (6+2) G1: A0653h CML-S (10+2, 8+2) P0: A0651h CML-S (6+2, 10+2) Q0/P1: A0654h CMP-H HM470: 068Dh CMP-H WM490: 068Eh CMP-H QM480: 068Ch CMP-H H470: 0684h CMP-H Z490: 0685h CMP-H Q470: 0687h TEST=Boot with CML-S (6+2) G1 + CMP-H WM490 and IDs are recognized Change-Id: I6bda09070ec330033eff95329448ace57e87144f Signed-off-by: Gaggery Tsai Reviewed-on: https://review.coreboot.org/c/coreboot/+/36684 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Angel Pons --- src/soc/intel/cannonlake/lpc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/cannonlake/lpc.c') diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c index a7fcd94d67..c4eb884a75 100644 --- a/src/soc/intel/cannonlake/lpc.c +++ b/src/soc/intel/cannonlake/lpc.c @@ -83,7 +83,8 @@ uint8_t get_pch_series(void) case 0x02: /* CML-LP */ pch_series = PCH_LP; break; - case 0xA3: + case 0xA3: /* CFL-H */ + case 0x06: /* CML-H */ pch_series = PCH_H; break; default: -- cgit v1.2.3