From 9b08a189667b74c220b5359755dc88cdfc08c950 Mon Sep 17 00:00:00 2001 From: Maulik V Vaghela Date: Tue, 17 Jul 2018 21:52:27 +0530 Subject: soc/intel/cannonlake: Update PMC base address for CNP H and LP PMC base address is different for CNP LP pch and CNP H pch. Added logic to determine PMC base addrress dynamically based on PCH ID. BUG=none BRANCH=none TEST=Boot Coffeelake U RVP board and check if PMC base address is determined correctly. Change-Id: I833395260e8fb631823bd03192a092df323250fa Signed-off-by: Maulik V Vaghela Reviewed-on: https://review.coreboot.org/27523 Reviewed-by: Naresh Solanki Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/lpc.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src/soc/intel/cannonlake/lpc.c') diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c index d399d1bcaf..84a2138efd 100644 --- a/src/soc/intel/cannonlake/lpc.c +++ b/src/soc/intel/cannonlake/lpc.c @@ -68,6 +68,24 @@ void soc_setup_dmi_pcr_io_dec(uint32_t *gen_io_dec) pcr_write32(PID_DMI, PCR_DMI_LPCLGIR4, gen_io_dec[3]); } +uint8_t get_pch_series(void) +{ + uint16_t lpc_did_hi_byte; + + /* + * Fetch upper 8 bits on LPC device ID to determine PCH type + * Adding 1 to the offset to fetch upper 8 bits + */ + lpc_did_hi_byte = pci_read_config8(PCH_DEV_LPC, PCI_DEVICE_ID + 1); + + if (lpc_did_hi_byte == 0x9D) + return PCH_LP; + else if (lpc_did_hi_byte == 0xA3) + return PCH_H; + else + return PCH_UNKNOWN_SERIES; +} + #if ENV_RAMSTAGE static void soc_mirror_dmi_pcr_io_dec(void) { -- cgit v1.2.3