From e2fafc0c8cd45c9365a1aa5b1276a6ab46b6a143 Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Wed, 9 Oct 2019 12:14:48 -0600 Subject: Revert "soc/intel/cannonlake: Remove DMA support for PTT" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This reverts commit d5018a8f78b9e1f0b7d3d1be298cba9716b10c6c. Reason for revert: Breaks boot on Whiskey Lake-U boards Both System76 and Purism have had memory initialization failures when this patch is applied, with the following error message: Failed to accommodate FSP reserved memory request! An extra 4096 bytes needs to be reserved for the FSP on these systems, and reinstating the PTT reservation does this as expected. PTT is enabled for the System76 galp3-c in the ME configuration, which is why the behaviour is different. Signed-off-by: Jeremy Soller CC: Matt DeVillier CC: Subrata Banik Change-Id: Ib82f02c4a2b1cd2dbf95d4ca4a9edd314e78edd2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/35924 Reviewed-by: Aaron Durbin Reviewed-by: Lance Zhao Reviewed-by: Michael Niewöhner Reviewed-by: Patrick Rudolph Reviewed-by: Matt DeVillier Reviewed-by: Philipp Deppenwiese Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/include/soc/iomap.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/intel/cannonlake/include') diff --git a/src/soc/intel/cannonlake/include/soc/iomap.h b/src/soc/intel/cannonlake/include/soc/iomap.h index 1ebaf3f7b6..9cfb59e7d0 100644 --- a/src/soc/intel/cannonlake/include/soc/iomap.h +++ b/src/soc/intel/cannonlake/include/soc/iomap.h @@ -68,6 +68,10 @@ #define HECI1_BASE_ADDRESS 0xfeda2000 +/* PTT registers */ +#define PTT_TXT_BASE_ADDRESS 0xfed30800 +#define PTT_PRESENT 0x00070000 + #define VTD_BASE_ADDRESS 0xFED90000 #define VTD_BASE_SIZE 0x00004000 /* -- cgit v1.2.3