From d5018a8f78b9e1f0b7d3d1be298cba9716b10c6c Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 21 Jun 2018 11:52:21 +0530 Subject: soc/intel/cannonlake: Remove DMA support for PTT Alternative buffer communication support for PTT is no longer needed for CNL onwards and coreboot does not need to reserve additional 4KiB memory for PTT support. Change-Id: I11993cef77fd5e879eedabc1ed344f91f8257c90 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/27176 Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/include/soc/iomap.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'src/soc/intel/cannonlake/include') diff --git a/src/soc/intel/cannonlake/include/soc/iomap.h b/src/soc/intel/cannonlake/include/soc/iomap.h index 2a3608cd41..75f11c0eee 100644 --- a/src/soc/intel/cannonlake/include/soc/iomap.h +++ b/src/soc/intel/cannonlake/include/soc/iomap.h @@ -65,10 +65,6 @@ #define HECI1_BASE_ADDRESS 0xfeda2000 -/* PTT registers */ -#define PTT_TXT_BASE_ADDRESS 0xfed30800 -#define PTT_PRESENT 0x00070000 - #define VTD_BASE_ADDRESS 0xFED90000 #define VTD_BASE_SIZE 0x00004000 /* -- cgit v1.2.3