From 9b08a189667b74c220b5359755dc88cdfc08c950 Mon Sep 17 00:00:00 2001 From: Maulik V Vaghela Date: Tue, 17 Jul 2018 21:52:27 +0530 Subject: soc/intel/cannonlake: Update PMC base address for CNP H and LP PMC base address is different for CNP LP pch and CNP H pch. Added logic to determine PMC base addrress dynamically based on PCH ID. BUG=none BRANCH=none TEST=Boot Coffeelake U RVP board and check if PMC base address is determined correctly. Change-Id: I833395260e8fb631823bd03192a092df323250fa Signed-off-by: Maulik V Vaghela Reviewed-on: https://review.coreboot.org/27523 Reviewed-by: Naresh Solanki Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/include/soc/lpc.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'src/soc/intel/cannonlake/include') diff --git a/src/soc/intel/cannonlake/include/soc/lpc.h b/src/soc/intel/cannonlake/include/soc/lpc.h index 3ea9be9203..a4e42bddf3 100644 --- a/src/soc/intel/cannonlake/include/soc/lpc.h +++ b/src/soc/intel/cannonlake/include/soc/lpc.h @@ -52,4 +52,16 @@ #define LPC_BC_EISS (1 << 5) /* EISS */ #define PCCTL 0xE0 /* PCI Clock Control */ #define CLKRUN_EN (1 << 0) + +/* + * This function will help to differentiate between 2 PCH on single type of soc. + * Since same soc may have LP series pch or H series PCH, we need to + * differentiate by reading upper 8 bits of PCH device ids. + * + * Return: + * Return PCH_LP or PCH_H macro in case of respective device ID found. + * PCH_UNKNOWN_SERIES in case of invalid device ID. + */ +uint8_t get_pch_series(void); + #endif -- cgit v1.2.3