From 747f05675ecf2d0fa4635c3b25e5726f7fe7d98d Mon Sep 17 00:00:00 2001 From: Lijian Zhao Date: Thu, 28 Sep 2017 16:11:53 -0700 Subject: soc/intel/cannonlake: Add northbridge dsdt table Add ACPI dsdt table for northbridge, report proper resources in dsdt entries. TEST=Boot up into OS fine. Change-Id: I382d87da087ae7828eaa7ff28bc9597a332ca5bc Signed-off-by: Lijian Zhao Reviewed-on: https://review.coreboot.org/21756 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/cannonlake/include/soc/iomap.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/intel/cannonlake/include') diff --git a/src/soc/intel/cannonlake/include/soc/iomap.h b/src/soc/intel/cannonlake/include/soc/iomap.h index 698c51028b..add5ee8a75 100644 --- a/src/soc/intel/cannonlake/include/soc/iomap.h +++ b/src/soc/intel/cannonlake/include/soc/iomap.h @@ -69,6 +69,8 @@ #define PTT_TXT_BASE_ADDRESS 0xfed30800 #define PTT_PRESENT 0x00070000 +#define VTD_BASE_ADDRESS 0xFED90000 +#define VTD_BASE_SIZE 0x00004000 /* * I/O port address space */ -- cgit v1.2.3