From 6cf501c3ae0278092cb76ccab015ad891af1fd48 Mon Sep 17 00:00:00 2001 From: Lijian Zhao Date: Tue, 10 Oct 2017 18:26:18 -0700 Subject: soc/intel/cannonlake: Add finalize function Before OS boot up, the following actions need to be taken. 1. Lock down PMC/SPI/DMI/TCO register. 2. Disable Sideband Access. 3. Disable Heci interface. 4. Disable PMtimer base on config settings. TEST=Boot up into OS properly on both cannonlake y and cannonlake u rvp board. Change-Id: Icfa05b50fd76fbaeb856d398918990aedac4c5e6 Signed-off-by: Lijian Zhao Reviewed-on: https://review.coreboot.org/21943 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/include/soc/pmc.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/intel/cannonlake/include') diff --git a/src/soc/intel/cannonlake/include/soc/pmc.h b/src/soc/intel/cannonlake/include/soc/pmc.h index a98b4bad7f..fd28859fa3 100644 --- a/src/soc/intel/cannonlake/include/soc/pmc.h +++ b/src/soc/intel/cannonlake/include/soc/pmc.h @@ -120,6 +120,9 @@ #define GBLRST_CAUSE0_THERMTRIP (1 << 5) #define GBLRST_CAUSE1 0x1928 +#define CPPMVRIC 0x1B1C +#define XTALSDQDIS (1 << 22) + #define IRQ_REG ACTL #define SCI_IRQ_ADJUST 0 #define ACTL 0x1BD8 -- cgit v1.2.3