From 031020e431f8d013108957b856da5ff5c7c596f3 Mon Sep 17 00:00:00 2001 From: Lijian Zhao Date: Fri, 15 Dec 2017 12:58:07 -0800 Subject: soc/intel/cannonlake: Correct PMC/GPIO routing information PMC and GPIO DWx definition is not identical, hence update that to correct information. For cannonlake lp PCH, GPIO group C, group E and group GPD is different for PMC GPIO_CFG and GPIO MISCCFG. Also add function call to set up GPE routing in bootblock stage. TEST=Boot up into OS, and manually check PMC GPE status Change-Id: I1edb83edabc72e8a762b129cf51dcd936cd37ddf Signed-off-by: Lijian Zhao Reviewed-on: https://review.coreboot.org/22908 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Nick Vaccaro --- src/soc/intel/cannonlake/gpio.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) (limited to 'src/soc/intel/cannonlake/gpio.c') diff --git a/src/soc/intel/cannonlake/gpio.c b/src/soc/intel/cannonlake/gpio.c index 0cc416424a..2ebe60b395 100644 --- a/src/soc/intel/cannonlake/gpio.c +++ b/src/soc/intel/cannonlake/gpio.c @@ -17,6 +17,7 @@ #include #include #include +#include static const struct reset_mapping rst_map[] = { { .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 0U << 30 }, @@ -100,15 +101,15 @@ const struct pad_community *soc_gpio_get_community(size_t *num_communities) const struct pmc_to_gpio_route *soc_pmc_gpio_routes(size_t *num) { static const struct pmc_to_gpio_route routes[] = { - { GPP_A, GPP_A }, - { GPP_B, GPP_B }, - { GPP_C, GPP_C }, - { GPP_D, GPP_D }, - { GPP_E, GPP_E }, - { GPP_F, GPP_F }, - { GPP_G, GPP_G }, - { GPP_H, GPP_H }, - { GPD, GPD }, + { PMC_GPP_A, GPP_A }, + { PMC_GPP_B, GPP_B }, + { PMC_GPP_C, GPP_C }, + { PMC_GPP_D, GPP_D }, + { PMC_GPP_E, GPP_E }, + { PMC_GPP_F, GPP_F }, + { PMC_GPP_G, GPP_G }, + { PMC_GPP_H, GPP_H }, + { PMC_GPD, GPD }, }; *num = ARRAY_SIZE(routes); return routes; -- cgit v1.2.3