From e4bc55b843ae3df52c6e92181ac3e9f2e6a949e7 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Mon, 26 Jul 2021 14:24:53 +0000 Subject: soc/intel/cannonlake: Disable `TccOffsetClamp` if no offset is given MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I4f9b62fd944d8a91d53bc584c88797f23de1e5ca Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/coreboot/+/56660 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Michael Niewöhner --- src/soc/intel/cannonlake/fsp_params.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/cannonlake/fsp_params.c') diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index 0924763523..4a88458b70 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -611,6 +611,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Set TccActivationOffset */ tconfig->TccActivationOffset = config->tcc_offset; + tconfig->TccOffsetClamp = config->tcc_offset > 0; /* Unlock all GPIO pads */ tconfig->PchUnlockGpioPads = config->PchUnlockGpioPads; -- cgit v1.2.3