From 78fbe3d8319bc8fdf82b76378d29c6c902fd13e5 Mon Sep 17 00:00:00 2001 From: Aamir Bohra Date: Mon, 15 Apr 2019 10:16:36 +0530 Subject: soc/intel/cannonlake: Add null reference check for Cnvi and Xdci Change-Id: I2e1011d9ac93ed764b6c2aa425928a972ec2aa43 Signed-off-by: Aamir Bohra Reviewed-on: https://review.coreboot.org/c/coreboot/+/32322 Reviewed-by: Maulik V Vaghela Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/fsp_params.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) (limited to 'src/soc/intel/cannonlake/fsp_params.c') diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index b8dba184cb..2b83275df1 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -245,9 +245,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Enable xDCI controller if enabled in devicetree and allowed */ dev = dev_find_slot(0, PCH_DEVFN_USBOTG); - if (!xdci_can_enable()) - dev->enabled = 0; - params->XdciEnable = dev->enabled; + if (dev) { + if (!xdci_can_enable()) + dev->enabled = 0; + params->XdciEnable = dev->enabled; + } else + params->XdciEnable = 0; /* Set Debug serial port */ params->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE; @@ -255,9 +258,15 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Enable CNVi Wifi if enabled in device tree */ dev = dev_find_slot(0, PCH_DEVFN_CNViWIFI); #if CONFIG(SOC_INTEL_COMETLAKE) - params->CnviMode = dev->enabled; + if (dev) + params->CnviMode = dev->enabled; + else + params->CnviMode = 0; #else - params->PchCnviMode = dev->enabled; + if (dev) + params->PchCnviMode = dev->enabled; + else + params->PchCnviMode = 0; #endif /* PCI Express */ for (i = 0; i < ARRAY_SIZE(config->PcieClkSrcUsage); i++) { -- cgit v1.2.3