From 06cc764483d1220aeed28ff1097e6d517f51b0dd Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 29 Jul 2019 14:21:55 +0530 Subject: soc/intel/cannonlake: Disable ACPI PM timer to reduce S0ix power usage This patch overrides EnableTcoTimer FSP UPD default value based on PmTimerDisabled coreboot devcietree config. BRANCH=none BUG=b:138152075 Change-Id: I347c15c7b65fb4c19b9680f127980d4ddab8df51 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/34506 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Aamir Bohra Reviewed-by: V Sowmya --- src/soc/intel/cannonlake/fsp_params.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/intel/cannonlake/fsp_params.c') diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index f696f79d04..3cc426a942 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -367,6 +367,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->PchPwrOptEnable = config->dmipwroptimize; params->SataPwrOptEnable = config->satapwroptimize; + /* Disable PCH ACPI timer */ + params->EnableTcoTimer = !config->PmTimerDisabled; + /* Apply minimum assertion width settings if non-zero */ if (config->PchPmSlpS3MinAssert) params->PchPmSlpS3MinAssert = config->PchPmSlpS3MinAssert; -- cgit v1.2.3