From 34745f613f4a2970b2298bd76bfaf737229a4a3a Mon Sep 17 00:00:00 2001 From: Lijian Zhao Date: Fri, 15 Feb 2019 05:36:50 -0800 Subject: soc/intel/common: Add whiskeylake celeron v-0 support New whiskeylake v-0 stepping have changed the graphics device id from 0x3EA0 to 0x3EA1 for celeron, so declare that in common code. Also the CPUID was changed from 806EB to 806EC, include that as well. Signed-off-by: Lijian Zhao Change-Id: Ief5213a96507124b90f8dd2eeea2f6bf43843dc6 Reviewed-on: https://review.coreboot.org/c/31433 Reviewed-by: Patrick Rudolph Reviewed-by: EricR Lai Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/bootblock/report_platform.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/cannonlake/bootblock') diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index 8839816591..e61c7f4a93 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -37,6 +37,7 @@ static struct { { CPUID_CANNONLAKE_C0, "Cannonlake C0" }, { CPUID_CANNONLAKE_D0, "Cannonlake D0" }, { CPUID_COFFEELAKE_D0, "Coffeelake D0" }, + { CPUID_WHISKEYLAKE_V0, "Whiskeylake V0"}, { CPUID_WHISKEYLAKE_W0, "Whiskeylake W0"}, { CPUID_COFFEELAKE_U0, "Coffeelake U0 (6+2)" }, }; -- cgit v1.2.3