From 0ac555e8fb2d551bfe70f87286fd73bac86c335e Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 28 Nov 2018 12:25:54 +0100 Subject: soc/intel/common: Rework acpi/cpu.asl Use acpigen_write_processor_cnot to implement notifications to the CPU. Change-Id: Id64f9857bbd7db520c94de949db8f823f71d6dae Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/29891 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie --- src/soc/intel/cannonlake/acpi/cpu.asl | 40 ++++++++++++++--------------------- 1 file changed, 16 insertions(+), 24 deletions(-) (limited to 'src/soc/intel/cannonlake/acpi') diff --git a/src/soc/intel/cannonlake/acpi/cpu.asl b/src/soc/intel/cannonlake/acpi/cpu.asl index 79314e6a88..5f65bd8b4b 100644 --- a/src/soc/intel/cannonlake/acpi/cpu.asl +++ b/src/soc/intel/cannonlake/acpi/cpu.asl @@ -13,31 +13,23 @@ * GNU General Public License for more details. */ -/* These devices are created at runtime */ -External (\_PR.CP00, DeviceObj) -External (\_PR.CP01, DeviceObj) -External (\_PR.CP02, DeviceObj) -External (\_PR.CP03, DeviceObj) -External (\_PR.CP04, DeviceObj) -External (\_PR.CP05, DeviceObj) -External (\_PR.CP06, DeviceObj) -External (\_PR.CP07, DeviceObj) +/* These come from the dynamically created CPU SSDT */ +External (\_PR.CNOT, MethodObj) -/* Notify OS to re-read CPU tables, assuming ^2 CPU count */ +/* Notify OS to re-read CPU tables */ Method (PNOT) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CP00, 0x81) // _CST - Notify (\_PR.CP01, 0x81) // _CST - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CP02, 0x81) // _CST - Notify (\_PR.CP03, 0x81) // _CST - } - If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CP04, 0x81) // _CST - Notify (\_PR.CP05, 0x81) // _CST - Notify (\_PR.CP06, 0x81) // _CST - Notify (\_PR.CP07, 0x81) // _CST - } + \_PR.CNOT (0x81) +} + +/* Notify OS to re-read CPU _PPC limit */ +Method (PPCN) +{ + \_PR.CNOT (0x80) +} + +/* Notify OS to re-read Throttle Limit tables */ +Method (TNOT) +{ + \_PR.CNOT (0x82) } -- cgit v1.2.3