From 1d900935df918318e198ae61eb8bf42ef1edf674 Mon Sep 17 00:00:00 2001 From: Lijian Zhao Date: Tue, 25 Sep 2018 15:52:03 -0700 Subject: soc/intel/cannonlake: Add ACPI entry for LAN Add ACPI DSDT entry for integrated Gigabit LAN controller. Change-Id: I15bf1d4065894531871380b3318f553b637f4a97 Signed-off-by: Lijian Zhao Reviewed-on: https://review.coreboot.org/28743 Reviewed-by: Duncan Laurie Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/acpi/southbridge.asl | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/cannonlake/acpi/southbridge.asl') diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl index e4f29b6a37..6fac398619 100644 --- a/src/soc/intel/cannonlake/acpi/southbridge.asl +++ b/src/soc/intel/cannonlake/acpi/southbridge.asl @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2017 Intel Corp. + * Copyright (C) 2017-2018 Intel Corp. * (Written by Bora Guvendik for Intel Corp.) * * This program is free software; you can redistribute it and/or modify @@ -48,3 +48,6 @@ /* CNVi */ #include "cnvi.asl" + +/* GBe 0:1f.6 */ +#include "pch_glan.asl" -- cgit v1.2.3