From 7f29896c773da31b31d3c4da7b8bfdfaacf691ad Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 3 Sep 2020 11:48:33 +0200 Subject: soc/intel/cannonlake: Add PCIe ports on PCH-H Fixes complains about missing INT configuration by the pciexp kernel modules. Tested with Linux 5.5 on Prodrive Hermes. Change-Id: I277f592cd8d2c86a9c7ba4b34d3f703f7d593582 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/45065 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/cannonlake/acpi/pci_irqs.asl | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'src/soc/intel/cannonlake/acpi/pci_irqs.asl') diff --git a/src/soc/intel/cannonlake/acpi/pci_irqs.asl b/src/soc/intel/cannonlake/acpi/pci_irqs.asl index 7439a0eb51..d35f4d76b9 100644 --- a/src/soc/intel/cannonlake/acpi/pci_irqs.asl +++ b/src/soc/intel/cannonlake/acpi/pci_irqs.asl @@ -24,6 +24,13 @@ Name (PICP, Package () { Package(){0x001CFFFF, 1, 0, PCIE_2_IRQ }, Package(){0x001CFFFF, 2, 0, PCIE_3_IRQ }, Package(){0x001CFFFF, 3, 0, PCIE_4_IRQ }, +#if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) + /* PCI Express Port 17-24 */ + Package(){0x001BFFFF, 0, 0, PCIE_17_IRQ }, + Package(){0x001BFFFF, 1, 0, PCIE_18_IRQ }, + Package(){0x001BFFFF, 2, 0, PCIE_19_IRQ }, + Package(){0x001BFFFF, 3, 0, PCIE_20_IRQ }, +#endif /* eMMC */ Package(){0x001AFFFF, 0, 0, eMMC_IRQ }, /* SerialIo */ @@ -88,6 +95,13 @@ Name (PICN, Package () { Package () { 0x001CFFFF, 1, 0, 10 }, Package () { 0x001CFFFF, 2, 0, 11 }, Package () { 0x001CFFFF, 3, 0, 11 }, +#if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) + /* D27: PCI Express Port 17-24 */ + Package () { 0x001BFFFF, 0, 0, 11 }, + Package () { 0x001BFFFF, 1, 0, 10 }, + Package () { 0x001BFFFF, 2, 0, 11 }, + Package () { 0x001BFFFF, 3, 0, 11 }, +#endif /* D25: Can't use PIC*/ /* D23 */ Package () { 0x0017FFFF, 0, 0, 11 }, -- cgit v1.2.3