From 6cf501c3ae0278092cb76ccab015ad891af1fd48 Mon Sep 17 00:00:00 2001 From: Lijian Zhao Date: Tue, 10 Oct 2017 18:26:18 -0700 Subject: soc/intel/cannonlake: Add finalize function Before OS boot up, the following actions need to be taken. 1. Lock down PMC/SPI/DMI/TCO register. 2. Disable Sideband Access. 3. Disable Heci interface. 4. Disable PMtimer base on config settings. TEST=Boot up into OS properly on both cannonlake y and cannonlake u rvp board. Change-Id: Icfa05b50fd76fbaeb856d398918990aedac4c5e6 Signed-off-by: Lijian Zhao Reviewed-on: https://review.coreboot.org/21943 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/cannonlake/Makefile.inc') diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 6fcee31adb..1076e10efe 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -30,6 +30,7 @@ romstage-$(CONFIG_UART_DEBUG) += uart.c ramstage-y += acpi.c ramstage-y += chip.c ramstage-y += cpu.c +ramstage-y += finalize.c ramstage-y += gpio.c ramstage-y += gspi.c ramstage-y += gpio.c -- cgit v1.2.3