From e462585c9446cecb6f8cf06f62311c6ef18a4cbf Mon Sep 17 00:00:00 2001
From: Aamir Bohra <aamir.bohra@intel.com>
Date: Tue, 29 May 2018 10:52:33 +0530
Subject: soc/intel/cannonlake: Enable IDT and expection handling support for
 all stages

Change-Id:I4146a040e5e43bed7ccc6cb0a7dc2271f1e7a8ea
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/26661
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
---
 src/soc/intel/cannonlake/Kconfig | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/soc/intel/cannonlake/Kconfig')

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index a095fb9f1f..3b6837448d 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -26,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS
 	select HAVE_INTEL_FIRMWARE
 	select HAVE_MONOTONIC_TIMER
 	select HAVE_SMI_HANDLER
+	select IDT_IN_EVERY_STAGE
 	select INTEL_GMA_ACPI
 	select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP
 	select IOAPIC
-- 
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