From dc23396a30bf13450f409eb9ed242ddc57283354 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Fri, 4 May 2018 13:43:15 +0530 Subject: soc/intel/cannonlake: Include stage cache support for CNL TEST=Build and boot cannonlake rvp. cpu_index() returns correct cpu index based on caller. Change-Id: I23f80ef455d075a14121577f401cfc7c44ba0cfa Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/26052 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh --- src/soc/intel/cannonlake/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/cannonlake/Kconfig') diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 898b4444d7..ea399b8431 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -17,6 +17,7 @@ config CPU_SPECIFIC_OPTIONS select BOOT_DEVICE_SUPPORTS_WRITES select C_ENVIRONMENT_BOOTBLOCK select CACHE_MRC_SETTINGS + select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select GENERIC_GPIO_LIB -- cgit v1.2.3