From c85890d0d8887462e72837c3ae6dd5b6842a81cb Mon Sep 17 00:00:00 2001
From: Lijian Zhao <lijian.zhao@intel.com>
Date: Fri, 20 Oct 2017 09:19:07 -0700
Subject: soc/intel/cannonlake: Change max root port to 16

Cannonlake SOC support up to 16 PCI express root port.

BUG=CID 1381813;1381814;

Change-Id: I4df610e3fb01bd8e62be7e9c62144125f2a96c25
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/22122
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
---
 src/soc/intel/cannonlake/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/soc/intel/cannonlake/Kconfig')

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 00aa6e9ac8..e45fe20fc4 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -110,7 +110,7 @@ config IED_REGION_SIZE
 
 config MAX_ROOT_PORTS
 	int
-	default 24
+	default 16
 
 config SMM_TSEG_SIZE
 	hex
-- 
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