From 1d93b88af2de9dd3af45ebaffcac4344baaf3d40 Mon Sep 17 00:00:00 2001 From: Joel Kitching Date: Wed, 26 Sep 2018 17:58:14 +0800 Subject: vboot: fix CONFIG_RESUME_PATH_SAME_AS_BOOT S3 resume logic - should not check VBOOT_STARTS_IN_BOOTBLOCK to set context flag - implement vboot_platform_is_resuming on platforms missing it - add ACPI_INTEL_HARDWARE_SLEEP_VALUES to two intel southbridges [ originally https://review.coreboot.org/c/coreboot/+/28750 ] BUG=b:114018226 TEST=compile coreboot Change-Id: I1ef0bcdfd01746198f8140f49698b58065d820b9 Signed-off-by: Joel Kitching Reviewed-on: https://review.coreboot.org/29060 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Philipp Deppenwiese --- src/soc/intel/broadwell/pmutil.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/soc/intel/broadwell') diff --git a/src/soc/intel/broadwell/pmutil.c b/src/soc/intel/broadwell/pmutil.c index 38991305b4..e19025bf7a 100644 --- a/src/soc/intel/broadwell/pmutil.c +++ b/src/soc/intel/broadwell/pmutil.c @@ -18,6 +18,7 @@ * and the differences between PCH variants. */ +#include #include #include #include @@ -29,6 +30,7 @@ #include #include #include +#include /* Print status bits with descriptive names */ static void print_status_bits(u32 status, const char *bit_names[]) @@ -473,3 +475,11 @@ int vbnv_cmos_failed(void) { return rtc_failure(); } + +int vboot_platform_is_resuming(void) +{ + if (!(inw(ACPI_BASE_ADDRESS + PM1_STS) & WAK_STS)) + return 0; + + return acpi_sleep_from_pm1(inl(ACPI_BASE_ADDRESS + PM1_CNT)) == ACPI_S3; +} -- cgit v1.2.3