From 3cc2c38d50741fffb9193851a4a3b7c636f7cd4d Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 23 Oct 2020 20:38:23 +0200 Subject: soc/intel/broadwell: Separate PCH in devicetree Flesh out the PCH configuration into a separate chip. Keep it within the Broadwell SoC directory for now, to ease moving files around. The boards were prepared beforehand and the devicetrees require next to no changes. Tested on out-of-tree Acer Aspire E5-573, still boots. Change-Id: I28d948f3e6d85e669d12b29516d867c1d1ae9e1a Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/46700 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/soc/intel/broadwell/me.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/broadwell/me.c') diff --git a/src/soc/intel/broadwell/me.c b/src/soc/intel/broadwell/me.c index 80ffe2b9ac..40a81d8810 100644 --- a/src/soc/intel/broadwell/me.c +++ b/src/soc/intel/broadwell/me.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #if CONFIG(CHROMEOS) #include @@ -950,7 +950,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data, struct device *dev) /* Check whether ME is present and do basic init */ static void intel_me_init(struct device *dev) { - config_t *config = config_of(dev); + const struct soc_intel_broadwell_pch_config *config = config_of(dev); me_bios_path path = intel_me_path(dev); me_bios_payload mbp_data; int mbp_ret; -- cgit v1.2.3