From 71756c21afd14f4114c597487406eb53e23730b2 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 12 Jul 2019 13:10:19 +0300 Subject: soc/intel: Expand SA_DEV_ROOT for ramstage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We do not want to disguise somewhat complex function calls as simple macros. Change-Id: I298f7f9a1c6a64cfba454e919eeaedc7bb2d4801 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34411 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/intel/broadwell/lpc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/broadwell/lpc.c') diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 9be4aebdd2..b385d6b637 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -365,6 +365,7 @@ static void pch_cg_init(struct device *dev) { u32 reg32; u16 reg16; + struct device *igd_dev = pcidev_path_on_root(SA_DEVFN_IGD); /* DMI */ RCBA32_OR(0x2234, 0xf); @@ -388,7 +389,7 @@ static void pch_cg_init(struct device *dev) RCBA32_AND_OR(0x2614, ~0x64ff0000, 0x0a206500); /* Check for 0:2.0@0x08 >= 0x0b */ - if (pch_is_wpt() || pci_read_config8(SA_DEV_IGD, 0x8) >= 0x0b) + if (pch_is_wpt() || pci_read_config8(igd_dev, 0x8) >= 0x0b) RCBA32_OR(0x2614, (1 << 26)); RCBA32_OR(0x900, 0x0000031f); -- cgit v1.2.3