From 9e6d143a82a852ddfa64f20ceb8695939c1dace1 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Wed, 13 Jul 2016 23:21:41 -0500 Subject: soc/intel/broadwell: use common Intel ACPI hardware definitions Transition to using the common Intel ACPI hardware definitions generic ACPI definitions. BUG=chrome-os-partner:54977 Change-Id: I99d909ee72c3abebb1e9c8ebf44137465264bf0d Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/15673 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi Reviewed-by: Furquan Shaikh --- src/soc/intel/broadwell/include/soc/pm.h | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) (limited to 'src/soc/intel/broadwell/include') diff --git a/src/soc/intel/broadwell/include/soc/pm.h b/src/soc/intel/broadwell/include/soc/pm.h index 3f5bc40809..18004fa77d 100644 --- a/src/soc/intel/broadwell/include/soc/pm.h +++ b/src/soc/intel/broadwell/include/soc/pm.h @@ -16,6 +16,8 @@ #ifndef _BROADWELL_PM_H_ #define _BROADWELL_PM_H_ +#include + /* ACPI_BASE_ADDRESS / PMBASE */ #define PM1_STS 0x00 @@ -34,14 +36,6 @@ #define GBL_EN (1 << 5) #define TMROF_EN (1 << 0) #define PM1_CNT 0x04 -#define SLP_EN (1 << 13) -#define SLP_TYP (7 << 10) -#define SLP_TYP_SHIFT 10 -#define SLP_TYP_S0 0 -#define SLP_TYP_S1 1 -#define SLP_TYP_S3 5 -#define SLP_TYP_S4 6 -#define SLP_TYP_S5 7 #define GBL_RLS (1 << 2) #define BM_RLD (1 << 1) #define SCI_EN (1 << 0) @@ -113,10 +107,6 @@ #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2 -#define SLEEP_STATE_S0 0 -#define SLEEP_STATE_S3 3 -#define SLEEP_STATE_S5 5 - struct chipset_power_state { uint16_t pm1_sts; uint16_t pm1_en; -- cgit v1.2.3