From 8950cfb66f8f1fd4b047fbef2347134be0aeacec Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 13 Jul 2019 22:16:25 +0300 Subject: soc/intel: Use config_of() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I0727a6b327410197cf32f598d1312737744386b3 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34328 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: David Guckian --- src/soc/intel/broadwell/igd.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/soc/intel/broadwell/igd.c') diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index 9107b23eb9..dab2d15750 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -298,7 +298,7 @@ static int gtt_poll(u32 reg, u32 mask, u32 value) static void igd_setup_panel(struct device *dev) { - config_t *conf = dev->chip_info; + config_t *conf = config_of(dev); u32 reg32; /* Setup Digital Port Hotplug */ @@ -349,7 +349,7 @@ static void igd_setup_panel(struct device *dev) static int igd_get_cdclk_haswell(u32 *const cdsel, int *const inform_pc, struct device *const dev) { - const config_t *const conf = dev->chip_info; + const config_t *const conf = config_of(dev); int cdclk = conf->cdclk; /* Check for ULX GT1 or GT2 */ @@ -383,7 +383,7 @@ static int igd_get_cdclk_broadwell(u32 *const cdsel, int *const inform_pc, struct device *const dev) { static const u32 cdsel_by_cdclk[] = { 0, 2, 0, 1, 3 }; - const config_t *const conf = dev->chip_info; + const config_t *const conf = config_of(dev); int cdclk = conf->cdclk; /* Check for ULX */ -- cgit v1.2.3