From 0f49bbceef3ee4d0755c5784c3dd647528b3c7bc Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 19 Feb 2018 17:35:55 -0600 Subject: soc/intel/broadwell: Generate ACPI DMAR table If the SoC is VT-d capable, write an ACPI DMAR table. The entry for the GFXVTBAR is only generated if the IGD is enabled. Change-Id: Id7c899954f1bae9d2b48532ca5ee271944f0c5f6 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/23821 Tested-by: build bot (Jenkins) Reviewed-by: Youness Alaoui Reviewed-by: Nico Huber --- src/soc/intel/broadwell/chip.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'src/soc/intel/broadwell/chip.c') diff --git a/src/soc/intel/broadwell/chip.c b/src/soc/intel/broadwell/chip.c index 8176c8ecda..c282c6b14a 100644 --- a/src/soc/intel/broadwell/chip.c +++ b/src/soc/intel/broadwell/chip.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -26,10 +27,13 @@ static void pci_domain_set_resources(device_t dev) } static struct device_operations pci_domain_ops = { - .read_resources = &pci_domain_read_resources, - .set_resources = &pci_domain_set_resources, - .scan_bus = &pci_domain_scan_bus, - .ops_pci_bus = &pci_bus_default_ops, + .read_resources = &pci_domain_read_resources, + .set_resources = &pci_domain_set_resources, + .scan_bus = &pci_domain_scan_bus, + .ops_pci_bus = &pci_bus_default_ops, +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) + .write_acpi_tables = &northbridge_write_acpi_tables, +#endif }; static struct device_operations cpu_bus_ops = { -- cgit v1.2.3