From 5bb15f1a4d18bafaf51b17fd9ea6d861f2b9ebd2 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sat, 22 Dec 2018 16:02:25 +0100 Subject: soc/intel/broadwell: Use C_ENVIRONMENT_BOOTBLOCK This puts the cache-as-ram init in the bootblock. Before setting up cache as ram the microcode updates are applied. This removes the possibility for a normal/fallback setup although implementing this should be quite easy. Setting up LPC in the bootblock to output console on SuperIOs is not done in this patch, therefore BOOTBLOCK_CONSOLE is not yet selected. Change-Id: I44eb6d380dea5b82e3f009a46381a0f611bb7935 Signed-off-by: Arthur Heymans Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/30383 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/broadwell/bootblock/systemagent.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/broadwell/bootblock/systemagent.c') diff --git a/src/soc/intel/broadwell/bootblock/systemagent.c b/src/soc/intel/broadwell/bootblock/systemagent.c index e618636eb2..7aaed789ac 100644 --- a/src/soc/intel/broadwell/bootblock/systemagent.c +++ b/src/soc/intel/broadwell/bootblock/systemagent.c @@ -16,8 +16,9 @@ #include #include #include +#include -static void bootblock_northbridge_init(void) +void bootblock_early_northbridge_init(void) { uint32_t reg; -- cgit v1.2.3