From b22765e0c76e909fe8dc74b9f8f86fc65f278c5e Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Thu, 30 Oct 2014 15:21:13 -0700 Subject: broadwell: Remove TPM device from lpc.asl This is not a standard feature so it should be included by the mainboard if it is actually present in a system. BUG=chrome-os-partner:33385 BRANCH=samus,auron TEST=build and boot on samus CQ-DEPEND=CL:226663, CL:226664 Change-Id: Id4d0e5ed243dcb95e64fb8c848667f651b75aa4e Signed-off-by: Stefan Reinauer Original-Commit-Id: 8909913f5c11c5805c77a3373859634b02a301e2 Original-Change-Id: Ib7c171a5a007a2dddfb3d80341c6dc488e383e99 Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/226662 Original-Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/9470 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/intel/broadwell/acpi/globalnvs.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/broadwell/acpi/globalnvs.asl') diff --git a/src/soc/intel/broadwell/acpi/globalnvs.asl b/src/soc/intel/broadwell/acpi/globalnvs.asl index 4ba384a4af..9bddbc212c 100644 --- a/src/soc/intel/broadwell/acpi/globalnvs.asl +++ b/src/soc/intel/broadwell/acpi/globalnvs.asl @@ -53,7 +53,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) TCRT, 8, // 0x10 - Critical Threshold TPSV, 8, // 0x11 - Passive Threshold TMAX, 8, // 0x12 - CPU Tj_max - TPMP, 8, // 0x13 - TPM Present + , 8, // 0x13 - Unused S5U0, 8, // 0x14 - Enable USB in S5 S3U0, 8, // 0x15 - Enable USB in S3 S33G, 8, // 0x16 - Enable 3G in S3 -- cgit v1.2.3