From fa42d568a00e5daadd35722790c529539227130e Mon Sep 17 00:00:00 2001
From: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Date: Fri, 8 May 2020 22:18:09 +0530
Subject: broadwell: update processor power limits configuration

Update processor power limit configuration parameters based on
common code base support for Intel Broadwell SoC based platforms.

BRANCH=None
BUG=None
TEST=Build for broadwell based platform

Change-Id: I97e38a533e74a122b6809e20a10f6e425827ab9c
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41234
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
---
 src/soc/intel/broadwell/acpi.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/soc/intel/broadwell/acpi.c')

diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c
index 588eb0c336..316b85a1e5 100644
--- a/src/soc/intel/broadwell/acpi.c
+++ b/src/soc/intel/broadwell/acpi.c
@@ -24,6 +24,7 @@
 #include <soc/pm.h>
 #include <soc/systemagent.h>
 #include <soc/intel/broadwell/chip.h>
+#include <intelblocks/cpulib.h>
 
 /*
  * List of supported C-states in this processor. Only the ULT parts support C8,
-- 
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