From 9f6cdbaaf5d1a799e314e0baf9f4fda218abdf75 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sun, 25 Oct 2020 00:02:29 +0000 Subject: Revert "broadwell: update processor power limits configuration" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This reverts commit fa42d568a00e5daadd35722790c529539227130e. Reason for revert: Passes in an incompatible structure and only happens to boot by chance. Moreover, Broadwell will soon be merged with Haswell and this requires Broadwell to not depend on any Intel common SoC code. Tested on out-of-tree Acer Aspire E5-573, PL values are correct again. Change-Id: I6e8e000dba8ff09fab4e6f174ab703348dcd6a96 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/45011 Reviewed-by: Michael Niewöhner Reviewed-by: Tim Wawrzynczak Reviewed-by: Sumeet R Pawnikar Tested-by: build bot (Jenkins) --- src/soc/intel/broadwell/acpi.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src/soc/intel/broadwell/acpi.c') diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 760842b2ab..1b4db1dae6 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -24,7 +24,6 @@ #include #include #include -#include /* * List of supported C-states in this processor. Only the ULT parts support C8, -- cgit v1.2.3