From fa42d568a00e5daadd35722790c529539227130e Mon Sep 17 00:00:00 2001 From: Sumeet R Pawnikar Date: Fri, 8 May 2020 22:18:09 +0530 Subject: broadwell: update processor power limits configuration Update processor power limit configuration parameters based on common code base support for Intel Broadwell SoC based platforms. BRANCH=None BUG=None TEST=Build for broadwell based platform Change-Id: I97e38a533e74a122b6809e20a10f6e425827ab9c Signed-off-by: Sumeet R Pawnikar Reviewed-on: https://review.coreboot.org/c/coreboot/+/41234 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/broadwell/Kconfig | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/broadwell/Kconfig') diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 20219d3939..67f7563a92 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -15,6 +15,7 @@ config CPU_SPECIFIC_OPTIONS select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select MRC_SETTINGS_PROTECT + select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER @@ -34,10 +35,12 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select TSC_MONOTONIC_TIMER select SOC_INTEL_COMMON + select SOC_INTEL_COMMON_BLOCK + select SOC_INTEL_COMMON_BLOCK_CPU + select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT select INTEL_DESCRIPTOR_MODE_CAPABLE select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select HAVE_SPI_CONSOLE_SUPPORT - select CPU_INTEL_COMMON select INTEL_GMA_ACPI select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE -- cgit v1.2.3