From a342f3937e7ce159fd170ab8cd26ba799a3bc9e4 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 17 Oct 2018 10:56:26 +0200 Subject: src: Remove unneeded whitespace Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/29161 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/intel/braswell/chip.c | 6 +++--- src/soc/intel/braswell/cpu.c | 4 ++-- src/soc/intel/braswell/emmc.c | 2 +- src/soc/intel/braswell/gfx.c | 6 +++--- src/soc/intel/braswell/lpe.c | 2 +- src/soc/intel/braswell/lpss.c | 2 +- src/soc/intel/braswell/pcie.c | 10 +++++----- src/soc/intel/braswell/sata.c | 2 +- src/soc/intel/braswell/scc.c | 2 +- src/soc/intel/braswell/sd.c | 2 +- src/soc/intel/braswell/southcluster.c | 26 +++++++++++++------------- 11 files changed, 32 insertions(+), 32 deletions(-) (limited to 'src/soc/intel/braswell') diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c index 4d135390f6..ccd6c9fe41 100644 --- a/src/soc/intel/braswell/chip.c +++ b/src/soc/intel/braswell/chip.c @@ -24,7 +24,7 @@ static void pci_domain_set_resources(struct device *dev) { - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); assign_resources(dev->link_list); } @@ -49,7 +49,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { - printk(BIOS_SPEW, "----------\n%s/%s ( %s ), type: %d\n", + printk(BIOS_SPEW, "----------\n%s/%s (%s), type: %d\n", __FILE__, __func__, dev_name(dev), dev->path.type); printk(BIOS_SPEW, "vendor: 0x%04x. device: 0x%04x\n", @@ -384,7 +384,7 @@ struct chip_operations soc_intel_braswell_ops = { static void pci_set_subsystem(struct device *dev, unsigned int vendor, unsigned int device) { - printk(BIOS_SPEW, "%s/%s ( %s, 0x%04x, 0x%04x )\n", + printk(BIOS_SPEW, "%s/%s (%s, 0x%04x, 0x%04x)\n", __FILE__, __func__, dev_name(dev), vendor, device); if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c index 27903e86e0..195dba4aea 100644 --- a/src/soc/intel/braswell/cpu.c +++ b/src/soc/intel/braswell/cpu.c @@ -47,7 +47,7 @@ static const struct reg_script core_msr_script[] = { static void soc_core_init(struct device *cpu) { - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(cpu)); printk(BIOS_DEBUG, "Init Braswell core.\n"); @@ -219,7 +219,7 @@ void soc_init_cpus(struct device *dev) { struct bus *cpu_bus = dev->link_list; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); if (mp_init_with_smm(cpu_bus, &mp_ops)) diff --git a/src/soc/intel/braswell/emmc.c b/src/soc/intel/braswell/emmc.c index 44116a8877..238f8db4b8 100644 --- a/src/soc/intel/braswell/emmc.c +++ b/src/soc/intel/braswell/emmc.c @@ -36,7 +36,7 @@ static void emmc_init(struct device *dev) { struct soc_intel_braswell_config *config = dev->chip_info; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); printk(BIOS_DEBUG, "eMMC init\n"); reg_script_run_on_dev(dev, emmc_ops); diff --git a/src/soc/intel/braswell/gfx.c b/src/soc/intel/braswell/gfx.c index b3295316a6..895d2ee7da 100644 --- a/src/soc/intel/braswell/gfx.c +++ b/src/soc/intel/braswell/gfx.c @@ -49,7 +49,7 @@ static inline void gfx_run_script(struct device *dev, static void gfx_pre_vbios_init(struct device *dev) { - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); printk(BIOS_INFO, "GFX: Pre VBIOS Init\n"); gfx_run_script(dev, gpu_pre_vbios_script); @@ -57,7 +57,7 @@ static void gfx_pre_vbios_init(struct device *dev) static void gfx_post_vbios_init(struct device *dev) { - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); printk(BIOS_INFO, "GFX: Post VBIOS Init\n"); gfx_run_script(dev, gfx_post_vbios_script); @@ -65,7 +65,7 @@ static void gfx_post_vbios_init(struct device *dev) static void gfx_init(struct device *dev) { - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); /* Pre VBIOS Init */ diff --git a/src/soc/intel/braswell/lpe.c b/src/soc/intel/braswell/lpe.c index 7c9f30637a..6338878a1e 100644 --- a/src/soc/intel/braswell/lpe.c +++ b/src/soc/intel/braswell/lpe.c @@ -153,7 +153,7 @@ static void lpe_init(struct device *dev) { struct soc_intel_braswell_config *config = dev->chip_info; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); lpe_stash_firmware_info(dev); diff --git a/src/soc/intel/braswell/lpss.c b/src/soc/intel/braswell/lpss.c index aac953ba1f..60ff49f709 100644 --- a/src/soc/intel/braswell/lpss.c +++ b/src/soc/intel/braswell/lpss.c @@ -143,7 +143,7 @@ static void lpss_init(struct device *dev) struct soc_intel_braswell_config *config = dev->chip_info; int iosf_reg, nvs_index; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); printk(BIOS_SPEW, "%s - %s\n", get_pci_class_name(dev), diff --git a/src/soc/intel/braswell/pcie.c b/src/soc/intel/braswell/pcie.c index 1a127f4190..efd891a7c8 100644 --- a/src/soc/intel/braswell/pcie.c +++ b/src/soc/intel/braswell/pcie.c @@ -41,7 +41,7 @@ static inline int is_first_port(struct device *dev) static void pcie_init(struct device *dev) { - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); } @@ -56,7 +56,7 @@ static void check_port_enabled(struct device *dev) { int rp_config = (strpfusecfg & LANECFG_MASK) >> LANECFG_SHIFT; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); switch (root_port_offset(dev)) { @@ -99,7 +99,7 @@ static void check_device_present(struct device *dev) static uint32_t rootports_in_use = MAX_ROOT_PORTS_BSW; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); /* Set slot implemented. */ pci_write_config32(dev, XCAP, pci_read_config32(dev, XCAP) | SI); @@ -137,7 +137,7 @@ static void check_device_present(struct device *dev) static void pcie_enable(struct device *dev) { - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); if (is_first_port(dev)) { struct soc_intel_braswell_config *config = dev->chip_info; @@ -162,7 +162,7 @@ static void pcie_enable(struct device *dev) static void pcie_root_set_subsystem(struct device *dev, unsigned int vid, unsigned int did) { - printk(BIOS_SPEW, "%s/%s ( %s, 0x%04x, 0x%04x )\n", + printk(BIOS_SPEW, "%s/%s (%s, 0x%04x, 0x%04x)\n", __FILE__, __func__, dev_name(dev), vid, did); uint32_t didvid = ((did & 0xffff) << 16) | (vid & 0xffff); diff --git a/src/soc/intel/braswell/sata.c b/src/soc/intel/braswell/sata.c index 8052b29e08..250764153f 100644 --- a/src/soc/intel/braswell/sata.c +++ b/src/soc/intel/braswell/sata.c @@ -30,7 +30,7 @@ typedef struct soc_intel_braswell_config config_t; static void sata_init(struct device *dev) { - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); } diff --git a/src/soc/intel/braswell/scc.c b/src/soc/intel/braswell/scc.c index 122c67ea39..17fc685b3c 100644 --- a/src/soc/intel/braswell/scc.c +++ b/src/soc/intel/braswell/scc.c @@ -29,7 +29,7 @@ void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index) struct resource *bar; global_nvs_t *gnvs; - printk(BIOS_SPEW, "%s/%s ( %s, 0x%08x, 0x%08x )\n", + printk(BIOS_SPEW, "%s/%s (%s, 0x%08x, 0x%08x)\n", __FILE__, __func__, dev_name(dev), iosf_reg, nvs_index); /* Find ACPI NVS to update BARs */ diff --git a/src/soc/intel/braswell/sd.c b/src/soc/intel/braswell/sd.c index 97c39b3254..1775ce74be 100644 --- a/src/soc/intel/braswell/sd.c +++ b/src/soc/intel/braswell/sd.c @@ -35,7 +35,7 @@ static void sd_init(struct device *dev) { struct soc_intel_braswell_config *config = dev->chip_info; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); if (config == NULL) diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c index 14b412a03f..ca87d63aa0 100644 --- a/src/soc/intel/braswell/southcluster.c +++ b/src/soc/intel/braswell/southcluster.c @@ -55,14 +55,14 @@ static inline void add_mmio_resource(struct device *dev, int i, unsigned long addr, unsigned long size) { - printk(BIOS_SPEW, "%s/%s ( %s, 0x%016lx, 0x%016lx )\n", + printk(BIOS_SPEW, "%s/%s (%s, 0x%016lx, 0x%016lx)\n", __FILE__, __func__, dev_name(dev), addr, size); mmio_resource(dev, i, addr >> 10, size >> 10); } static void sc_add_mmio_resources(struct device *dev) { - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); add_mmio_resource(dev, 0xfeb, ABORT_BASE_ADDRESS, ABORT_BASE_SIZE); add_mmio_resource(dev, PBASE, PMC_BASE_ADDRESS, PMC_BASE_SIZE); @@ -102,7 +102,7 @@ static void sc_add_io_resource(struct device *dev, int base, int size, { struct resource *res; - printk(BIOS_SPEW, "%s/%s ( %s, 0x%08x, 0x%08x, 0x%08x )\n", + printk(BIOS_SPEW, "%s/%s (%s, 0x%08x, 0x%08x, 0x%08x)\n", __FILE__, __func__, dev_name(dev), base, size, index); if (io_range_in_default(base, size)) @@ -118,7 +118,7 @@ static void sc_add_io_resources(struct device *dev) { struct resource *res; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); /* Add the default claimed IO range for the LPC device. */ @@ -136,7 +136,7 @@ static void sc_add_io_resources(struct device *dev) static void sc_read_resources(struct device *dev) { - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); /* Get the normal PCI resources of this device. */ @@ -165,7 +165,7 @@ static void sc_init(struct device *dev) const struct soc_irq_route *ir = &global_soc_irq_route; struct soc_intel_braswell_config *config = dev->chip_info; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); /* Set up the PIRQ PIC routing based on static config. */ @@ -206,7 +206,7 @@ static void sc_disable_devfn(struct device *dev) uint32_t mask = 0; uint32_t mask2 = 0; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); #define SET_DIS_MASK(name_) \ @@ -292,7 +292,7 @@ static inline void set_d3hot_bits(struct device *dev, int offset) { uint32_t reg8; - printk(BIOS_SPEW, "%s/%s ( %s, 0x%08x )\n", + printk(BIOS_SPEW, "%s/%s (%s, 0x%08x)\n", __FILE__, __func__, dev_name(dev), offset); printk(BIOS_DEBUG, "Power management CAP offset 0x%x.\n", offset); reg8 = pci_read_config8(dev, offset + 4); @@ -309,7 +309,7 @@ static void hda_work_around(struct device *dev) { void *gctl = (void *)(TEMP_BASE_ADDRESS + 0x8); - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); /* Need to set magic register 0x43 to 0xd7 in config space. */ @@ -331,7 +331,7 @@ static int place_device_in_d3hot(struct device *dev) { unsigned int offset; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); /* @@ -410,7 +410,7 @@ void southcluster_enable_dev(struct device *dev) { uint32_t reg32; - printk(BIOS_SPEW, "%s/%s ( %s )\n", + printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); if (!dev->enabled) { int slot = PCI_SLOT(dev->path.pci.devfn); @@ -461,7 +461,7 @@ static const struct pci_driver southcluster __pci_driver = { int __weak mainboard_get_spi_config(struct spi_config *cfg) { - printk(BIOS_SPEW, "%s/%s ( 0x%p )\n", + printk(BIOS_SPEW, "%s/%s (0x%p)\n", __FILE__, __func__, (void *)cfg); return -1; } @@ -475,7 +475,7 @@ static void finalize_chipset(void *unused) uint8_t *spi = (uint8_t *)SPI_BASE_ADDRESS; struct spi_config cfg; - printk(BIOS_SPEW, "%s/%s ( 0x%p )\n", + printk(BIOS_SPEW, "%s/%s (0x%p)\n", __FILE__, __func__, unused); /* Set the lock enable on the BIOS control register. */ -- cgit v1.2.3